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authorMauro Carvalho Chehab <mchehab+huawei@kernel.org>2021-07-18 13:40:52 +0200
committerThierry Reding <treding@nvidia.com>2021-10-07 21:24:25 +0200
commit354754f559507e0dba014aa830c70e73e7d52f98 (patch)
treef79bde7e633805fa3b6501bef105b145acbd8267
parentdt-bindings: Add YAML bindings for NVDEC (diff)
downloadlinux-354754f559507e0dba014aa830c70e73e7d52f98.tar.xz
linux-354754f559507e0dba014aa830c70e73e7d52f98.zip
dt-bindings: PCI: tegra194: Fix PCIe endpoint node names
As defined by Documentation/devicetree/bindings/pci/pci-ep.yaml, PCIe endpoints match this pattern: properties: $nodename: pattern: "^pcie-ep@" Change the existing ones in the DT bindings examples to avoid warnings during DT bindings validation. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
-rw-r--r--Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt2
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt b/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt
index 6a99d2aa8075..8e4f9bfb316d 100644
--- a/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt
@@ -197,7 +197,7 @@ Tegra194 RC mode:
Tegra194 EP mode:
-----------------
- pcie_ep@141a0000 {
+ pcie-ep@141a0000 {
compatible = "nvidia,tegra194-pcie-ep", "snps,dw-pcie-ep";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX8A>;
reg = <0x00 0x141a0000 0x0 0x00020000 /* appl registers (128K) */