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| author | Alex Deucher <alexander.deucher@amd.com> | 2021-05-04 15:58:26 +0200 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2021-05-11 00:06:45 +0200 |
| commit | 36f77e12a21eea07901bed8c6f0a170c7c7bf1b1 (patch) | |
| tree | c100182fdd357a91a24ce3f3a5b6350960aca70d | |
| parent | drm/amdgpu: Add graphics cache rinse packet for sdma 5.0 (diff) | |
| download | linux-36f77e12a21eea07901bed8c6f0a170c7c7bf1b1.tar.xz linux-36f77e12a21eea07901bed8c6f0a170c7c7bf1b1.zip | |
drm/amdgpu: drop the GCR packet from the emit_ib frame for sdma5.0
It's not needed here and has been added to the proper place
in the previous patch. This aligns with what we do for sdma 5.2.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 12 |
1 files changed, 0 insertions, 12 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c index d294ef6a625a..04c68a79eca4 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c @@ -405,18 +405,6 @@ static void sdma_v5_0_ring_emit_ib(struct amdgpu_ring *ring, unsigned vmid = AMDGPU_JOB_GET_VMID(job); uint64_t csa_mc_addr = amdgpu_sdma_get_csa_mc_addr(ring, vmid); - /* Invalidate L2, because if we don't do it, we might get stale cache - * lines from previous IBs. - */ - amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_GCR_REQ)); - amdgpu_ring_write(ring, 0); - amdgpu_ring_write(ring, (SDMA_GCR_GL2_INV | - SDMA_GCR_GL2_WB | - SDMA_GCR_GLM_INV | - SDMA_GCR_GLM_WB) << 16); - amdgpu_ring_write(ring, 0xffffff80); - amdgpu_ring_write(ring, 0xffff); - /* An IB packet must end on a 8 DW boundary--the next dword * must be on a 8-dword boundary. Our IB packet below is 6 * dwords long, thus add x number of NOPs, such that, in |