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| author | Stephen Boyd <sboyd@kernel.org> | 2022-01-12 03:31:00 +0100 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2022-01-12 03:31:00 +0100 |
| commit | 4afd2a9355a9deb16ea42b896820dacf49843a8f (patch) | |
| tree | 3d59babae91762121bc1932342f75f0bde30e575 | |
| parent | Merge branches 'clk-socfpga', 'clk-toshiba', 'clk-st' and 'clk-bitmain' into ... (diff) | |
| parent | clk: ingenic: Add MDMA and BDMA clocks (diff) | |
| parent | clk: mediatek: add mt7986 clock support (diff) | |
| download | linux-4afd2a9355a9deb16ea42b896820dacf49843a8f.tar.xz linux-4afd2a9355a9deb16ea42b896820dacf49843a8f.zip | |
Merge branches 'clk-ingenic' and 'clk-mediatek' into clk-next
- Add MDMA and BDMA clks to Ingenic JZ4760 and JZ4770
- MediaTek mt7986 SoC basic support
* clk-ingenic:
clk: ingenic: Add MDMA and BDMA clocks
dt-bindings: clk/ingenic: Add MDMA and BDMA clocks
* clk-mediatek:
clk: mediatek: add mt7986 clock support
clk: mediatek: add mt7986 clock IDs
dt-bindings: clock: mediatek: document clk bindings for mediatek mt7986 SoC
clk: mediatek: clk-gate: Use regmap_{set/clear}_bits helpers
clk: mediatek: clk-gate: Shrink by adding clockgating bit check helper