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authorWill Deacon <will@kernel.org>2024-07-12 17:57:34 +0200
committerWill Deacon <will@kernel.org>2024-07-12 17:57:34 +0200
commit578cc98b66f5a5c607d03b4191a314ec51d19e5f (patch)
treef5ee9f63dd1b0560ab558661d5cf1dbeb4a17f27
parentMerge branch 'iommu/fwspec-ops-removal' into iommu/next (diff)
parentarm64: dts: fvp: Enable PCIe ATS for Base RevC FVP (diff)
downloadlinux-578cc98b66f5a5c607d03b4191a314ec51d19e5f.tar.xz
linux-578cc98b66f5a5c607d03b4191a314ec51d19e5f.zip
Merge branch 'iommu/pci/ats' into iommu/next
* iommu/pci/ats: arm64: dts: fvp: Enable PCIe ATS for Base RevC FVP iommu/of: Support ats-supported device-tree property dt-bindings: PCI: generic: Add ats-supported property
-rw-r--r--Documentation/devicetree/bindings/pci/host-generic-pci.yaml6
-rw-r--r--arch/arm64/boot/dts/arm/fvp-base-revc.dts1
-rw-r--r--drivers/iommu/of_iommu.c9
3 files changed, 16 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pci/host-generic-pci.yaml b/Documentation/devicetree/bindings/pci/host-generic-pci.yaml
index 3484e0b4b412..bcfbaf5582cc 100644
--- a/Documentation/devicetree/bindings/pci/host-generic-pci.yaml
+++ b/Documentation/devicetree/bindings/pci/host-generic-pci.yaml
@@ -110,6 +110,12 @@ properties:
iommu-map-mask: true
msi-parent: true
+ ats-supported:
+ description:
+ Indicates that a PCIe host controller supports ATS, and can handle Memory
+ Requests with Address Type (AT).
+ type: boolean
+
required:
- compatible
- reg
diff --git a/arch/arm64/boot/dts/arm/fvp-base-revc.dts b/arch/arm64/boot/dts/arm/fvp-base-revc.dts
index 60472d65a355..85f1c15cc65d 100644
--- a/arch/arm64/boot/dts/arm/fvp-base-revc.dts
+++ b/arch/arm64/boot/dts/arm/fvp-base-revc.dts
@@ -243,6 +243,7 @@
iommu-map = <0x0 &smmu 0x0 0x10000>;
dma-coherent;
+ ats-supported;
};
smmu: iommu@2b400000 {
diff --git a/drivers/iommu/of_iommu.c b/drivers/iommu/of_iommu.c
index 559c5db78edb..78d61da75257 100644
--- a/drivers/iommu/of_iommu.c
+++ b/drivers/iommu/of_iommu.c
@@ -100,6 +100,14 @@ static int of_iommu_configure_device(struct device_node *master_np,
of_iommu_configure_dev(master_np, dev);
}
+static void of_pci_check_device_ats(struct device *dev, struct device_node *np)
+{
+ struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
+
+ if (fwspec && of_property_read_bool(np, "ats-supported"))
+ fwspec->flags |= IOMMU_FWSPEC_PCI_RC_ATS;
+}
+
/*
* Returns:
* 0 on success, an iommu was configured
@@ -136,6 +144,7 @@ int of_iommu_configure(struct device *dev, struct device_node *master_np,
pci_request_acs();
err = pci_for_each_dma_alias(to_pci_dev(dev),
of_pci_iommu_init, &info);
+ of_pci_check_device_ats(dev, master_np);
} else {
err = of_iommu_configure_device(master_np, dev, id);
}