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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2019-01-25 11:56:05 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2019-02-11 14:11:35 +0100 |
| commit | 5e8588c86d71e78de9e97103324d9127063f18d0 (patch) | |
| tree | fc495e4e131b29947877343ad72edb5041f4bc83 | |
| parent | pinctrl: sh-pfc: sh73a0: Fix fsic_spdif pin groups (diff) | |
| download | linux-5e8588c86d71e78de9e97103324d9127063f18d0.tar.xz linux-5e8588c86d71e78de9e97103324d9127063f18d0.zip | |
pinctrl: sh-pfc: Validate fixed-size field widths at build time
Add a build-time check, to ensure the register and field widths in
descriptors for config registers with fixed-width fields are sane.
This helps catching bugs early.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
| -rw-r--r-- | drivers/pinctrl/sh-pfc/sh_pfc.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h index 46d477ff5109..56016cb76769 100644 --- a/drivers/pinctrl/sh-pfc/sh_pfc.h +++ b/drivers/pinctrl/sh-pfc/sh_pfc.h @@ -126,7 +126,8 @@ struct pinmux_cfg_reg { * one for each possible combination of the register field bit values. */ #define PINMUX_CFG_REG(name, r, r_width, f_width) \ - .reg = r, .reg_width = r_width, .field_width = f_width, \ + .reg = r, .reg_width = r_width, \ + .field_width = f_width + BUILD_BUG_ON_ZERO(r_width % f_width), \ .enum_ids = (const u16 [(r_width / f_width) * (1 << f_width)]) /* |