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author | Qipan Li <Qipan.Li@csr.com> | 2014-04-14 08:29:59 +0200 |
---|---|---|
committer | Mark Brown <broonie@linaro.org> | 2014-04-14 22:03:34 +0200 |
commit | 6ee8a2f7d5e78700b6e64799b5e9976b21cfad79 (patch) | |
tree | 8b0eae032373d5e8369a732f279c0217574049b2 | |
parent | spi: sirf: set SPI controller in RISC IO chipselect mode (diff) | |
download | linux-6ee8a2f7d5e78700b6e64799b5e9976b21cfad79.tar.xz linux-6ee8a2f7d5e78700b6e64799b5e9976b21cfad79.zip |
spi: sirf: make GPIO chipselect function work well
orignal GPIO chipslect is not standard because it don't take care to the
chipselect signal: BITBANG_CS_ACTIVE and BITBANG_CS_INACTIVE.
Signed-off-by: Qipan Li <Qipan.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
-rw-r--r-- | drivers/spi/spi-sirf.c | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/drivers/spi/spi-sirf.c b/drivers/spi/spi-sirf.c index 9b30743d816a..67d8909dcf39 100644 --- a/drivers/spi/spi-sirf.c +++ b/drivers/spi/spi-sirf.c @@ -470,7 +470,16 @@ static void spi_sirfsoc_chipselect(struct spi_device *spi, int value) writel(regval, sspi->base + SIRFSOC_SPI_CTRL); } else { int gpio = sspi->chipselect[spi->chip_select]; - gpio_direction_output(gpio, spi->mode & SPI_CS_HIGH ? 0 : 1); + switch (value) { + case BITBANG_CS_ACTIVE: + gpio_direction_output(gpio, + spi->mode & SPI_CS_HIGH ? 1 : 0); + break; + case BITBANG_CS_INACTIVE: + gpio_direction_output(gpio, + spi->mode & SPI_CS_HIGH ? 0 : 1); + break; + } } } |