diff options
| author | Kees Cook <keescook@chromium.org> | 2017-10-17 01:29:33 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2017-10-20 14:06:46 +0200 |
| commit | 75d1760f4cd1b2dc9f41b4218bc78b5678a0f184 (patch) | |
| tree | 91ad9ed9cfc8b68c02be0c6632ec6f40b070a5d4 | |
| parent | tty/sysrq: Convert timers to use timer_setup() (diff) | |
| download | linux-75d1760f4cd1b2dc9f41b4218bc78b5678a0f184.tar.xz linux-75d1760f4cd1b2dc9f41b4218bc78b5678a0f184.zip | |
tty: mips_ejtag_fdc: Convert timers to use timer_setup()
In preparation for unconditionally passing the struct timer_list pointer to
all timer callbacks, switch to using the new timer_setup() and from_timer()
to pass the timer pointer explicitly.
Cc: Jiri Slaby <jslaby@suse.com>
Signed-off-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| -rw-r--r-- | drivers/tty/mips_ejtag_fdc.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/tty/mips_ejtag_fdc.c b/drivers/tty/mips_ejtag_fdc.c index a2dab3fb8751..51678f3a8c25 100644 --- a/drivers/tty/mips_ejtag_fdc.c +++ b/drivers/tty/mips_ejtag_fdc.c @@ -683,9 +683,9 @@ static irqreturn_t mips_ejtag_fdc_isr(int irq, void *dev_id) * It simply triggers the common FDC handler code and arranges for further * polling. */ -static void mips_ejtag_fdc_tty_timer(unsigned long opaque) +static void mips_ejtag_fdc_tty_timer(struct timer_list *t) { - struct mips_ejtag_fdc_tty *priv = (void *)opaque; + struct mips_ejtag_fdc_tty *priv = from_timer(priv, t, poll_timer); mips_ejtag_fdc_handle(priv); if (!priv->removing) @@ -1002,8 +1002,8 @@ static int mips_ejtag_fdc_tty_probe(struct mips_cdmm_device *dev) raw_spin_unlock_irq(&priv->lock); } else { /* If we didn't get an usable IRQ, poll instead */ - setup_pinned_timer(&priv->poll_timer, mips_ejtag_fdc_tty_timer, - (unsigned long)priv); + timer_setup(&priv->poll_timer, mips_ejtag_fdc_tty_timer, + TIMER_PINNED); priv->poll_timer.expires = jiffies + FDC_TTY_POLL; /* * Always attach the timer to the right CPU. The channels are |