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authorAndre Przywara <andre.przywara@arm.com>2022-11-07 01:54:25 +0100
committerJernej Skrabec <jernej.skrabec@gmail.com>2022-11-16 19:35:22 +0100
commit77eac2b9e1d86f1abef3cba4fee54f35e186c954 (patch)
tree4c50f41c873184dc2dd8d56dc8c9032834046602
parentdt-bindings: pwm: allwinner,sun4i-a10: Add F1C100s compatible (diff)
downloadlinux-77eac2b9e1d86f1abef3cba4fee54f35e186c954.tar.xz
linux-77eac2b9e1d86f1abef3cba4fee54f35e186c954.zip
ARM: dts: suniv: f1c100s: add PWM node
The Allwinner F1C100s family of SoCs contain a PWM controller compatible to the one used in the A20 chip. Add the DT node so that any users can simply enable it in their board DT. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Thierry Reding <thierry.reding@gmail.com> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20221107005433.11079-3-andre.przywara@arm.com Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
-rw-r--r--arch/arm/boot/dts/suniv-f1c100s.dtsi9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/suniv-f1c100s.dtsi b/arch/arm/boot/dts/suniv-f1c100s.dtsi
index 0edc1724407b..419d93346e69 100644
--- a/arch/arm/boot/dts/suniv-f1c100s.dtsi
+++ b/arch/arm/boot/dts/suniv-f1c100s.dtsi
@@ -192,6 +192,15 @@
clocks = <&osc32k>;
};
+ pwm: pwm@1c21000 {
+ compatible = "allwinner,suniv-f1c100s-pwm",
+ "allwinner,sun7i-a20-pwm";
+ reg = <0x01c21000 0x400>;
+ clocks = <&osc24M>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
uart0: serial@1c25000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c25000 0x400>;