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authorBjorn Helgaas <bhelgaas@google.com>2021-11-30 23:08:41 +0100
committerAndy Shevchenko <andriy.shevchenko@linux.intel.com>2021-12-01 14:10:26 +0100
commit7bc14ff2952da56d445efab50256569fc96aa95b (patch)
treed23add10c457c89f44101ef4a6cfacc6274694b0
parentgpio: ml-ioh: Use BIT() to match gpio-pch.c (diff)
downloadlinux-7bc14ff2952da56d445efab50256569fc96aa95b.tar.xz
linux-7bc14ff2952da56d445efab50256569fc96aa95b.zip
gpio: ml-ioh: Change whitespace to match gpio-pch.c
The ML IOH driver is very similar to the PCH driver. To make it more similar, tweak the whitespace in ioh_gpio_direction_output() and ioh_gpio_direction_input(). No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-rw-r--r--drivers/gpio/gpio-ml-ioh.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpio/gpio-ml-ioh.c b/drivers/gpio/gpio-ml-ioh.c
index 0fb9c8bc9b2d..b060c4773698 100644
--- a/drivers/gpio/gpio-ml-ioh.c
+++ b/drivers/gpio/gpio-ml-ioh.c
@@ -122,8 +122,8 @@ static int ioh_gpio_direction_output(struct gpio_chip *gpio, unsigned nr,
unsigned long flags;
spin_lock_irqsave(&chip->spinlock, flags);
- pm = ioread32(&chip->reg->regs[chip->ch].pm) &
- (BIT(num_ports[chip->ch]) - 1);
+ pm = ioread32(&chip->reg->regs[chip->ch].pm);
+ pm &= BIT(num_ports[chip->ch]) - 1;
pm |= BIT(nr);
iowrite32(pm, &chip->reg->regs[chip->ch].pm);
@@ -146,8 +146,8 @@ static int ioh_gpio_direction_input(struct gpio_chip *gpio, unsigned nr)
unsigned long flags;
spin_lock_irqsave(&chip->spinlock, flags);
- pm = ioread32(&chip->reg->regs[chip->ch].pm) &
- (BIT(num_ports[chip->ch]) - 1);
+ pm = ioread32(&chip->reg->regs[chip->ch].pm);
+ pm &= BIT(num_ports[chip->ch]) - 1;
pm &= ~BIT(nr);
iowrite32(pm, &chip->reg->regs[chip->ch].pm);
spin_unlock_irqrestore(&chip->spinlock, flags);