diff options
| author | Tony Lindgren <tony@atomide.com> | 2021-03-08 10:35:08 +0100 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2021-03-10 12:59:18 +0100 |
| commit | 7f7acef8571a239568abaf5f3dc7694d18ae970b (patch) | |
| tree | ef1d44dfdba504b62cb7fef24c32ea9f176746ae | |
| parent | soc: ti: omap-prm: Allow hardware supported retention when idle (diff) | |
| download | linux-7f7acef8571a239568abaf5f3dc7694d18ae970b.tar.xz linux-7f7acef8571a239568abaf5f3dc7694d18ae970b.zip | |
clk: ti: omap5: Add missing gpmc and ocmc clkctrl
The gpmc clock is needed to update omap5 to boot with genpd with the
related devicetree patches. The ocmc clock is currently not used but
let's add it so we have all the clocks for the l3main2 defined.
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Tero Kristo <kristo@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
| -rw-r--r-- | drivers/clk/ti/clk-54xx.c | 2 | ||||
| -rw-r--r-- | include/dt-bindings/clock/omap5.h | 2 |
2 files changed, 4 insertions, 0 deletions
diff --git a/drivers/clk/ti/clk-54xx.c b/drivers/clk/ti/clk-54xx.c index f0542391ca4b..90e0a9ea6351 100644 --- a/drivers/clk/ti/clk-54xx.c +++ b/drivers/clk/ti/clk-54xx.c @@ -156,6 +156,8 @@ static const struct omap_clkctrl_reg_data omap5_l3main1_clkctrl_regs[] __initcon static const struct omap_clkctrl_reg_data omap5_l3main2_clkctrl_regs[] __initconst = { { OMAP5_L3_MAIN_2_CLKCTRL, NULL, 0, "l3_iclk_div" }, + { OMAP5_L3_MAIN_2_GPMC_CLKCTRL, NULL, CLKF_HW_SUP, "l3_iclk_div" }, + { OMAP5_L3_MAIN_2_OCMC_RAM_CLKCTRL, NULL, CLKF_HW_SUP, "l3_iclk_div" }, { 0 }, }; diff --git a/include/dt-bindings/clock/omap5.h b/include/dt-bindings/clock/omap5.h index 41775272fd27..90e0d4b00127 100644 --- a/include/dt-bindings/clock/omap5.h +++ b/include/dt-bindings/clock/omap5.h @@ -32,6 +32,8 @@ /* l3main2 clocks */ #define OMAP5_L3_MAIN_2_CLKCTRL OMAP5_CLKCTRL_INDEX(0x20) +#define OMAP5_L3_MAIN_2_GPMC_CLKCTRL OMAP5_CLKCTRL_INDEX(0x28) +#define OMAP5_L3_MAIN_2_OCMC_RAM_CLKCTRL OMAP5_CLKCTRL_INDEX(0x30) /* ipu clocks */ #define OMAP5_MMU_IPU_CLKCTRL OMAP5_CLKCTRL_INDEX(0x20) |