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| author | Lijo Lazar <lijo.lazar@amd.com> | 2023-06-13 12:35:21 +0200 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2023-06-15 17:06:58 +0200 |
| commit | 82a1f42f6aeb54e29b78aa0890ffd3087120264a (patch) | |
| tree | d859eff2e358aaf535909129106126bc81bc64ff | |
| parent | drm/amdgpu: add wait_for helper for spirom update (diff) | |
| download | linux-82a1f42f6aeb54e29b78aa0890ffd3087120264a.tar.xz linux-82a1f42f6aeb54e29b78aa0890ffd3087120264a.zip | |
drm/amdgpu: Release SDMAv4.4.2 ecc irq properly
Release ECC irq only if irq is enabled - only when RAS feature is enabled
ECC irq gets enabled.
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c | 16 |
1 files changed, 10 insertions, 6 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c index 8eebf9c2bbcd..4b033b2988b2 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c @@ -1434,9 +1434,11 @@ static int sdma_v4_4_2_hw_fini(void *handle) return 0; inst_mask = GENMASK(adev->sdma.num_instances - 1, 0); - for (i = 0; i < adev->sdma.num_instances; i++) { - amdgpu_irq_put(adev, &adev->sdma.ecc_irq, - AMDGPU_SDMA_IRQ_INSTANCE0 + i); + if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__SDMA)) { + for (i = 0; i < adev->sdma.num_instances; i++) { + amdgpu_irq_put(adev, &adev->sdma.ecc_irq, + AMDGPU_SDMA_IRQ_INSTANCE0 + i); + } } sdma_v4_4_2_inst_ctx_switch_enable(adev, false, inst_mask); @@ -2073,9 +2075,11 @@ static int sdma_v4_4_2_xcp_suspend(void *handle, uint32_t inst_mask) uint32_t tmp_mask = inst_mask; int i; - for_each_inst(i, tmp_mask) { - amdgpu_irq_put(adev, &adev->sdma.ecc_irq, - AMDGPU_SDMA_IRQ_INSTANCE0 + i); + if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__SDMA)) { + for_each_inst(i, tmp_mask) { + amdgpu_irq_put(adev, &adev->sdma.ecc_irq, + AMDGPU_SDMA_IRQ_INSTANCE0 + i); + } } sdma_v4_4_2_inst_ctx_switch_enable(adev, false, inst_mask); |