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authorEnric Balletbo i Serra <enric.balletbo@collabora.com>2020-10-30 12:36:16 +0100
committerMatthias Brugger <matthias.bgg@gmail.com>2020-11-27 11:58:07 +0100
commit86a378bb1e98793409e5decfef50edadbca659c5 (patch)
tree832cd47a50bb4087f05a3444f5643f73e7bd82ba
parentdt-bindings: power: Add bindings for the Mediatek SCPSYS power domains contro... (diff)
downloadlinux-86a378bb1e98793409e5decfef50edadbca659c5.tar.xz
linux-86a378bb1e98793409e5decfef50edadbca659c5.zip
dt-bindings: power: Add MT8183 power domains
Add power domains dt-bindings for MT8183. Signed-off-by: Matthias Brugger <mbrugger@suse.com> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20201030113622.201188-11-enric.balletbo@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
-rw-r--r--Documentation/devicetree/bindings/power/mediatek,power-controller.yaml2
-rw-r--r--include/dt-bindings/power/mt8183-power.h26
2 files changed, 28 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
index 73b8988bd063..8cae43412327 100644
--- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
+++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
@@ -24,6 +24,7 @@ properties:
compatible:
enum:
- mediatek,mt8173-power-controller
+ - mediatek,mt8183-power-controller
'#power-domain-cells':
const: 1
@@ -58,6 +59,7 @@ patternProperties:
description: |
Power domain index. Valid values are defined in:
"include/dt-bindings/power/mt8173-power.h" - for MT8173 type power domain.
+ "include/dt-bindings/power/mt8183-power.h" - for MT8183 type power domain.
maxItems: 1
clocks:
diff --git a/include/dt-bindings/power/mt8183-power.h b/include/dt-bindings/power/mt8183-power.h
new file mode 100644
index 000000000000..d1ab387ba8c7
--- /dev/null
+++ b/include/dt-bindings/power/mt8183-power.h
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2020 MediaTek Inc.
+ * Author: Weiyi Lu <weiyi.lu@mediatek.com>
+ */
+
+#ifndef _DT_BINDINGS_POWER_MT8183_POWER_H
+#define _DT_BINDINGS_POWER_MT8183_POWER_H
+
+#define MT8183_POWER_DOMAIN_AUDIO 0
+#define MT8183_POWER_DOMAIN_CONN 1
+#define MT8183_POWER_DOMAIN_MFG_ASYNC 2
+#define MT8183_POWER_DOMAIN_MFG 3
+#define MT8183_POWER_DOMAIN_MFG_CORE0 4
+#define MT8183_POWER_DOMAIN_MFG_CORE1 5
+#define MT8183_POWER_DOMAIN_MFG_2D 6
+#define MT8183_POWER_DOMAIN_DISP 7
+#define MT8183_POWER_DOMAIN_CAM 8
+#define MT8183_POWER_DOMAIN_ISP 9
+#define MT8183_POWER_DOMAIN_VDEC 10
+#define MT8183_POWER_DOMAIN_VENC 11
+#define MT8183_POWER_DOMAIN_VPU_TOP 12
+#define MT8183_POWER_DOMAIN_VPU_CORE0 13
+#define MT8183_POWER_DOMAIN_VPU_CORE1 14
+
+#endif /* _DT_BINDINGS_POWER_MT8183_POWER_H */