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authorTao Ren <rentao.bupt@gmail.com>2023-08-04 01:03:24 +0200
committerJoel Stanley <joel@jms.id.au>2023-08-10 14:03:53 +0200
commit8dc783d9e26d3694b954ece13dd75c135a6d43e9 (patch)
tree632160d879e5008d9b2de96c6e59645fa78ce04b
parentARM: dts: aspeed: wedge400: Enable more ADC channels (diff)
downloadlinux-8dc783d9e26d3694b954ece13dd75c135a6d43e9.tar.xz
linux-8dc783d9e26d3694b954ece13dd75c135a6d43e9.zip
ARM: dts: aspeed: wedge400: Set eMMC max frequency
Set eMMC max frequency to 25MHz to prevent intermittent eMMC access failures. Signed-off-by: Tao Ren <rentao.bupt@gmail.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20230803230324.731268-4-rentao.bupt@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
-rw-r--r--arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge400.dts1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge400.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge400.dts
index 5c55afed946f..d17b977fee9b 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge400.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge400.dts
@@ -367,6 +367,7 @@
};
&sdhci1 {
+ max-frequency = <25000000>;
/*
* DMA mode needs to be disabled to avoid conflicts with UHCI
* Controller in AST2500 SoC.