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| author | Alex Deucher <alexander.deucher@amd.com> | 2018-05-10 21:59:31 +0200 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2018-05-24 06:51:21 +0200 |
| commit | 8f9b2e506129e6eb0d21d163f361dd68a050b974 (patch) | |
| tree | ddfa553c370d19a7c6a0720efe418da98cc438de | |
| parent | drm/amdgpu: add new DF 1.7 register defs (diff) | |
| download | linux-8f9b2e506129e6eb0d21d163f361dd68a050b974.tar.xz linux-8f9b2e506129e6eb0d21d163f361dd68a050b974.zip | |
drm/amdgpu: add new DF callback for ECC setup
The ForceParWrRMW setting needs to be enabled for ECC, but disabled
when ECC is not enabled.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index 03a2c0be0bf2..a59c07590cee 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -1401,6 +1401,8 @@ struct amdgpu_df_funcs { bool enable); void (*get_clockgating_state)(struct amdgpu_device *adev, u32 *flags); + void (*enable_ecc_force_par_wr_rmw)(struct amdgpu_device *adev, + bool enable); }; /* Define the HW IP blocks will be used in driver , add more if necessary */ enum amd_hw_ip_block_type { |