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authorMaxime Ripard <maxime.ripard@free-electrons.com>2016-10-14 16:32:26 +0200
committerMaxime Ripard <maxime.ripard@free-electrons.com>2016-11-22 15:33:55 +0100
commit915688621ba485fe7f232621229cb125e776f407 (patch)
treebdedf64ff8d559697d9b690475c06cf125569774
parentARM: sun5i: chip: add a node for the w1 gpio controller (diff)
downloadlinux-915688621ba485fe7f232621229cb125e776f407.tar.xz
linux-915688621ba485fe7f232621229cb125e776f407.zip
ARM: sun5i: Rename A10s pins
The SPI2 pins on the sun5i PB bank are only available on the A10s. Rename the A10s only bank so that it doesn't confuse people on the other SoCs whose indexing would start at b. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
-rw-r--r--arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts4
-rw-r--r--arch/arm/boot/dts/sun5i-a10s.dtsi4
2 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
index aef91476f9ae..0684d7930d65 100644
--- a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
+++ b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
@@ -250,8 +250,8 @@
&spi2 {
pinctrl-names = "default";
- pinctrl-0 = <&spi2_pins_a>,
- <&spi2_cs0_pins_a>;
+ pinctrl-0 = <&spi2_pins_b>,
+ <&spi2_cs0_pins_b>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi
index c41a2ba34dde..7aa8c7aa0153 100644
--- a/arch/arm/boot/dts/sun5i-a10s.dtsi
+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
@@ -243,14 +243,14 @@
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
- spi2_pins_a: spi2@0 {
+ spi2_pins_b: spi2@1 {
allwinner,pins = "PB12", "PB13", "PB14";
allwinner,function = "spi2";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
- spi2_cs0_pins_a: spi2_cs0@0 {
+ spi2_cs0_pins_b: spi2_cs0@1 {
allwinner,pins = "PB11";
allwinner,function = "spi2";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;