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| author | Shiji Yang <yangshiji66@outlook.com> | 2023-06-20 12:43:22 +0200 |
|---|---|---|
| committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2023-06-21 14:53:19 +0200 |
| commit | 9f9a035e6156a57d9da062b26d2a48d031744a1e (patch) | |
| tree | 4e3e66eeae2172dcf983debc2197a4a63ebdc0fb | |
| parent | MAINTAINERS: add Mediatek MTMIPS Clock maintainer (diff) | |
| download | linux-9f9a035e6156a57d9da062b26d2a48d031744a1e.tar.xz linux-9f9a035e6156a57d9da062b26d2a48d031744a1e.zip | |
mips: pci-mt7620: do not print NFTS register value as error log
These codes are used to read NFTS_TIMEOUT_DELAY register value and
write it into kernel log after writing the register. they are only
used for debugging during driver development, so there is no need
to keep them now.
Tested on MT7628AN router Motorola MWR03.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| -rw-r--r-- | arch/mips/pci/pci-mt7620.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/arch/mips/pci/pci-mt7620.c b/arch/mips/pci/pci-mt7620.c index 2700d75d41c5..df3347643bed 100644 --- a/arch/mips/pci/pci-mt7620.c +++ b/arch/mips/pci/pci-mt7620.c @@ -274,9 +274,6 @@ static int mt7628_pci_hw_init(struct platform_device *pdev) val |= 0x50 << 8; pci_config_write(NULL, 0, 0x70c, 4, val); - pci_config_read(NULL, 0, 0x70c, 4, &val); - dev_err(&pdev->dev, "Port 0 N_FTS = %x\n", (unsigned int) val); - return 0; } |