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author | Satya Priya Kakitapalli <quic_skakitap@quicinc.com> | 2024-09-06 13:39:05 +0200 |
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committer | Stephen Boyd <sboyd@kernel.org> | 2024-09-09 23:06:07 +0200 |
commit | a4d89b11aca3ffa73e234f06685261ce85e5fb41 (patch) | |
tree | 928763c6c06978486b9d1f764f9f1de64df79381 | |
parent | clk: qcom: gcc-sc8280xp: don't use parking clk_ops for QUPs (diff) | |
download | linux-a4d89b11aca3ffa73e234f06685261ce85e5fb41.tar.xz linux-a4d89b11aca3ffa73e234f06685261ce85e5fb41.zip |
clk: qcom: clk-alpha-pll: Simplify the zonda_pll_adjust_l_val()
In zonda_pll_adjust_l_val() replace the divide operator with comparison
operator to fix below build error and smatch warning.
drivers/clk/qcom/clk-alpha-pll.o: In function `clk_zonda_pll_set_rate':
clk-alpha-pll.c:(.text+0x45dc): undefined reference to `__aeabi_uldivmod'
smatch warnings:
drivers/clk/qcom/clk-alpha-pll.c:2129 zonda_pll_adjust_l_val() warn: replace
divide condition '(remainder * 2) / prate' with '(remainder * 2) >= prate'
Fixes: f4973130d255 ("clk: qcom: clk-alpha-pll: Update set_rate for Zonda PLL")
Reported-by: Jon Hunter <jonathanh@nvidia.com>
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
Closes: https://lore.kernel.org/r/202408110724.8pqbpDiD-lkp@intel.com/
Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
Link: https://lore.kernel.org/r/20240906113905.641336-1-quic_skakitap@quicinc.com
Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
-rw-r--r-- | drivers/clk/qcom/clk-alpha-pll.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c index ad9a84d521fc..31bf9d13f154 100644 --- a/drivers/clk/qcom/clk-alpha-pll.c +++ b/drivers/clk/qcom/clk-alpha-pll.c @@ -2124,10 +2124,8 @@ static void zonda_pll_adjust_l_val(unsigned long rate, unsigned long prate, u32 quotient = rate; remainder = do_div(quotient, prate); - *l = quotient; - if ((remainder * 2) / prate) - *l = *l + 1; + *l = rate + (u32)(remainder * 2 >= prate); } static int clk_zonda_pll_set_rate(struct clk_hw *hw, unsigned long rate, |