diff options
author | Po-Hao Huang <phhuang@realtek.com> | 2023-06-16 14:55:38 +0200 |
---|---|---|
committer | Kalle Valo <kvalo@kernel.org> | 2023-06-21 11:41:45 +0200 |
commit | ad6741b1e0449ba8f4eb41dc28e269dc20ab9219 (patch) | |
tree | 7f9164f102c93426109ac84fbfdd45079d3b60e2 | |
parent | wifi: rtw88: Skip high queue in hci_flush (diff) | |
download | linux-ad6741b1e0449ba8f4eb41dc28e269dc20ab9219.tar.xz linux-ad6741b1e0449ba8f4eb41dc28e269dc20ab9219.zip |
wifi: rtw88: Stop high queue during scan
When traversing channel list, TX in high queue should be disabled
along with beacon function, so packets won't be sent to incorrect
channels.
Signed-off-by: Po-Hao Huang <phhuang@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20230616125540.36877-5-pkshih@realtek.com
-rw-r--r-- | drivers/net/wireless/realtek/rtw88/main.c | 7 | ||||
-rw-r--r-- | drivers/net/wireless/realtek/rtw88/reg.h | 1 |
2 files changed, 6 insertions, 2 deletions
diff --git a/drivers/net/wireless/realtek/rtw88/main.c b/drivers/net/wireless/realtek/rtw88/main.c index 9447a3aae3b5..d55b041a6bb9 100644 --- a/drivers/net/wireless/realtek/rtw88/main.c +++ b/drivers/net/wireless/realtek/rtw88/main.c @@ -2403,10 +2403,13 @@ void rtw_core_enable_beacon(struct rtw_dev *rtwdev, bool enable) if (!rtwdev->ap_active) return; - if (enable) + if (enable) { rtw_write32_set(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION); - else + rtw_write32_clr(rtwdev, REG_TXPAUSE, BIT_HIGH_QUEUE); + } else { rtw_write32_clr(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION); + rtw_write32_set(rtwdev, REG_TXPAUSE, BIT_HIGH_QUEUE); + } } MODULE_AUTHOR("Realtek Corporation"); diff --git a/drivers/net/wireless/realtek/rtw88/reg.h b/drivers/net/wireless/realtek/rtw88/reg.h index 60de9de1cc7a..7c6c11d50ff3 100644 --- a/drivers/net/wireless/realtek/rtw88/reg.h +++ b/drivers/net/wireless/realtek/rtw88/reg.h @@ -378,6 +378,7 @@ #define BIT_SIFS_BK_EN BIT(12) #define REG_TXPAUSE 0x0522 #define BIT_AC_QUEUE GENMASK(7, 0) +#define BIT_HIGH_QUEUE BIT(5) #define REG_RD_CTRL 0x0524 #define BIT_EDCCA_MSK_CNTDOWN_EN BIT(11) #define BIT_DIS_TXOP_CFE BIT(10) |