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author | Linus Torvalds <torvalds@linux-foundation.org> | 2023-11-12 20:05:31 +0100 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2023-11-12 20:05:31 +0100 |
commit | b57b17e88bf58860dad312d08db7d6708ee6d06d (patch) | |
tree | 4ac9929a130cded36b50788c3d7bcfc2d4ec202d | |
parent | Merge tag 'loongarch-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/ch... (diff) | |
parent | parisc: Prevent booting 64-bit kernels on PA1.x machines (diff) | |
download | linux-b57b17e88bf58860dad312d08db7d6708ee6d06d.tar.xz linux-b57b17e88bf58860dad312d08db7d6708ee6d06d.zip |
Merge tag 'parisc-for-6.7-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux
Pull parisc architecture fixes from Helge Deller:
- Include the upper 5 address bits when inserting TLB entries on a
64-bit kernel.
On physical machines those are ignored, but in qemu it's nice to have
them included and to be correct.
- Stop the 64-bit kernel and show a warning if someone tries to boot on
a machine with a 32-bit CPU
- Fix a "no previous prototype" warning in parport-gsc
* tag 'parisc-for-6.7-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux:
parisc: Prevent booting 64-bit kernels on PA1.x machines
parport: gsc: mark init function static
parisc/pgtable: Do not drop upper 5 address bits of physical address
-rw-r--r-- | arch/parisc/kernel/entry.S | 7 | ||||
-rw-r--r-- | arch/parisc/kernel/head.S | 5 | ||||
-rw-r--r-- | drivers/parport/parport_gsc.c | 2 |
3 files changed, 6 insertions, 8 deletions
diff --git a/arch/parisc/kernel/entry.S b/arch/parisc/kernel/entry.S index cab1ec23e0d7..ab23e61a6f01 100644 --- a/arch/parisc/kernel/entry.S +++ b/arch/parisc/kernel/entry.S @@ -475,13 +475,13 @@ * to a CPU TLB 4k PFN (4k => 12 bits to shift) */ #define PAGE_ADD_SHIFT (PAGE_SHIFT-12) #define PAGE_ADD_HUGE_SHIFT (REAL_HPAGE_SHIFT-12) + #define PFN_START_BIT (63-ASM_PFN_PTE_SHIFT+(63-58)-PAGE_ADD_SHIFT) /* Drop prot bits and convert to page addr for iitlbt and idtlbt */ .macro convert_for_tlb_insert20 pte,tmp #ifdef CONFIG_HUGETLB_PAGE copy \pte,\tmp - extrd,u \tmp,(63-ASM_PFN_PTE_SHIFT)+(63-58)+PAGE_ADD_SHIFT,\ - 64-PAGE_SHIFT-PAGE_ADD_SHIFT,\pte + extrd,u \tmp,PFN_START_BIT,PFN_START_BIT+1,\pte depdi _PAGE_SIZE_ENCODING_DEFAULT,63,\ (63-58)+PAGE_ADD_SHIFT,\pte @@ -489,8 +489,7 @@ depdi _HUGE_PAGE_SIZE_ENCODING_DEFAULT,63,\ (63-58)+PAGE_ADD_HUGE_SHIFT,\pte #else /* Huge pages disabled */ - extrd,u \pte,(63-ASM_PFN_PTE_SHIFT)+(63-58)+PAGE_ADD_SHIFT,\ - 64-PAGE_SHIFT-PAGE_ADD_SHIFT,\pte + extrd,u \pte,PFN_START_BIT,PFN_START_BIT+1,\pte depdi _PAGE_SIZE_ENCODING_DEFAULT,63,\ (63-58)+PAGE_ADD_SHIFT,\pte #endif diff --git a/arch/parisc/kernel/head.S b/arch/parisc/kernel/head.S index a171bf3c6b31..96e0264ac961 100644 --- a/arch/parisc/kernel/head.S +++ b/arch/parisc/kernel/head.S @@ -70,9 +70,8 @@ $bss_loop: stw,ma %arg2,4(%r1) stw,ma %arg3,4(%r1) -#if !defined(CONFIG_64BIT) && defined(CONFIG_PA20) - /* This 32-bit kernel was compiled for PA2.0 CPUs. Check current CPU - * and halt kernel if we detect a PA1.x CPU. */ +#if defined(CONFIG_PA20) + /* check for 64-bit capable CPU as required by current kernel */ ldi 32,%r10 mtctl %r10,%cr11 .level 2.0 diff --git a/drivers/parport/parport_gsc.c b/drivers/parport/parport_gsc.c index 5e4475254bd0..c7e18382dc01 100644 --- a/drivers/parport/parport_gsc.c +++ b/drivers/parport/parport_gsc.c @@ -392,7 +392,7 @@ static struct parisc_driver parport_driver __refdata = { .remove = __exit_p(parport_remove_chip), }; -int parport_gsc_init(void) +static int parport_gsc_init(void) { return register_parisc_driver(&parport_driver); } |