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author | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2022-10-18 00:59:54 +0200 |
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committer | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2022-10-18 18:17:24 +0200 |
commit | ca1941f8ed433f4418c811b0d33dcd1b71e7fbdf (patch) | |
tree | 16610298f4697bd8d9440c134c8e604a93501966 | |
parent | dt-bindings: pinctrl: qcom,sm8350: drop checks used in common TLMM (diff) | |
download | linux-ca1941f8ed433f4418c811b0d33dcd1b71e7fbdf.tar.xz linux-ca1941f8ed433f4418c811b0d33dcd1b71e7fbdf.zip |
dt-bindings: pinctrl: qcom,sm8450: drop checks used in common TLMM
The common Qualcomm TLMM pin controller schema already brings
requirement of function for GPIO pins.
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20221017230012.47878-16-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
-rw-r--r-- | Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml | 11 |
1 files changed, 1 insertions, 10 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml index 9cd97a467648..7ab9a0eec017 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml @@ -60,6 +60,7 @@ $defs: description: Pinctrl node's client devices use subnodes for desired pin configuration. Client device subnodes use below standard properties. + $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state properties: pins: @@ -112,16 +113,6 @@ $defs: required: - pins - allOf: - - $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state" - - if: - properties: - pins: - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|20[0-9])$" - then: - required: - - function - additionalProperties: false examples: |