diff options
| author | William Wu <william.wu@rock-chips.com> | 2023-12-26 08:19:59 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2024-01-02 14:35:23 +0100 |
| commit | ca2dc35e555e7043de585f4e46123d8fbd2b5a21 (patch) | |
| tree | 2df8e46a36e60d8967fe3b762543d8fcdbc5f020 | |
| parent | Revert "usb: typec: class: fix typec_altmode_put_partner to put plugs" (diff) | |
| download | linux-ca2dc35e555e7043de585f4e46123d8fbd2b5a21.tar.xz linux-ca2dc35e555e7043de585f4e46123d8fbd2b5a21.zip | |
usb: dwc2: Disable clock gating feature on Rockchip SoCs
The DWC2 IP on the Rockchip SoCs doesn't support clock gating.
When a clock gating is enabled, system hangs.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Acked-by: Minas Harutyunyan <hminas@synopsys.com>
Link: https://lore.kernel.org/r/1703575199-23638-1-git-send-email-william.wu@rock-chips.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| -rw-r--r-- | drivers/usb/dwc2/params.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c index fb03162ae9b7..eb677c3cfd0b 100644 --- a/drivers/usb/dwc2/params.c +++ b/drivers/usb/dwc2/params.c @@ -130,6 +130,7 @@ static void dwc2_set_rk_params(struct dwc2_hsotg *hsotg) p->lpm_clock_gating = false; p->besl = false; p->hird_threshold_en = false; + p->no_clock_gating = true; } static void dwc2_set_ltq_params(struct dwc2_hsotg *hsotg) |