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| author | Tony Lindgren <tony@atomide.com> | 2016-11-08 00:50:11 +0100 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2016-11-08 00:52:05 +0100 |
| commit | cbf2642872333547b56b8c4d943f5ed04ac9a4ee (patch) | |
| tree | 37ac8de34f36e09631989eb04e36b7e706a473d6 | |
| parent | ARM: OMAP5: Fix mpuss_early_init (diff) | |
| download | linux-cbf2642872333547b56b8c4d943f5ed04ac9a4ee.tar.xz linux-cbf2642872333547b56b8c4d943f5ed04ac9a4ee.zip | |
ARM: OMAP4+: Fix bad fallthrough for cpuidle
We don't want to fall through to a bunch of errors for retention
if PM_OMAP4_CPU_OSWR_DISABLE is not configured for a SoC.
Fixes: 6099dd37c669 ("ARM: OMAP5 / DRA7: Enable CPU RET on suspend")
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
| -rw-r--r-- | arch/arm/mach-omap2/omap-mpuss-lowpower.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c index 94428b476d8f..7d62ad48c7c9 100644 --- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c +++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c @@ -245,10 +245,9 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state) save_state = 1; break; case PWRDM_POWER_RET: - if (IS_PM44XX_ERRATUM(PM_OMAP4_CPU_OSWR_DISABLE)) { + if (IS_PM44XX_ERRATUM(PM_OMAP4_CPU_OSWR_DISABLE)) save_state = 0; - break; - } + break; default: /* * CPUx CSWR is invalid hardware state. Also CPUx OSWR |