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author | Icenowy Zheng <icenowy@aosc.xyz> | 2017-04-04 11:50:56 +0200 |
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committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2017-04-04 17:43:45 +0200 |
commit | d4879bda912107b137e743b67cf063814191cca7 (patch) | |
tree | 7fdc39e24c7688eb2ae557bf32af655a3a1bac08 | |
parent | clk: sunxi-ng: sun5i: Fix mux width for csi clock (diff) | |
download | linux-d4879bda912107b137e743b67cf063814191cca7.tar.xz linux-d4879bda912107b137e743b67cf063814191cca7.zip |
dt-bindings: update device tree binding for Allwinner PRCM CCUs
Many Allwinner SoCs after A31 have a CCU in PRCM block.
Give the ones on H3 and A64 compatible strings.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-rw-r--r-- | Documentation/devicetree/bindings/clock/sunxi-ccu.txt | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/clock/sunxi-ccu.txt b/Documentation/devicetree/bindings/clock/sunxi-ccu.txt index 68512aa398a9..e9c5a1d9834a 100644 --- a/Documentation/devicetree/bindings/clock/sunxi-ccu.txt +++ b/Documentation/devicetree/bindings/clock/sunxi-ccu.txt @@ -7,9 +7,11 @@ Required properties : - "allwinner,sun8i-a23-ccu" - "allwinner,sun8i-a33-ccu" - "allwinner,sun8i-h3-ccu" + - "allwinner,sun8i-h3-r-ccu" - "allwinner,sun8i-v3s-ccu" - "allwinner,sun9i-a80-ccu" - "allwinner,sun50i-a64-ccu" + - "allwinner,sun50i-a64-r-ccu" - "allwinner,sun50i-h5-ccu" - reg: Must contain the registers base address and length @@ -20,7 +22,10 @@ Required properties : - #clock-cells : must contain 1 - #reset-cells : must contain 1 -Example: +For the PRCM CCUs on H3/A64, one more clock is needed: +- "iosc": the SoC's internal frequency oscillator + +Example for generic CCU: ccu: clock@01c20000 { compatible = "allwinner,sun8i-h3-ccu"; reg = <0x01c20000 0x400>; @@ -29,3 +34,13 @@ ccu: clock@01c20000 { #clock-cells = <1>; #reset-cells = <1>; }; + +Example for PRCM CCU: +r_ccu: clock@01f01400 { + compatible = "allwinner,sun50i-a64-r-ccu"; + reg = <0x01f01400 0x100>; + clocks = <&osc24M>, <&osc32k>, <&iosc>; + clock-names = "hosc", "losc", "iosc"; + #clock-cells = <1>; + #reset-cells = <1>; +}; |