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authorRoger Quadros <rogerq@ti.com>2014-08-26 01:15:33 +0200
committerTony Lindgren <tony@atomide.com>2014-08-26 01:15:33 +0200
commitd5c1eb17ba052966debc4d9d103fc15740b541fa (patch)
tree713308552fffccfec2db1a85c4d34bae02e6c5f5
parentARM: OMAP2+: GPMC: Support Software ECC scheme via DT (diff)
downloadlinux-d5c1eb17ba052966debc4d9d103fc15740b541fa.tar.xz
linux-d5c1eb17ba052966debc4d9d103fc15740b541fa.zip
ARM: dts: omap3430-sdp: Revert to using software ECC for NAND
For v3.14 and prior, 1-bit Hamming code ECC via software was used for NAND on this board. Commit c06c52701695 in v3.15 changed the behaviour to use 1-bit Hamming code via Hardware using a different ECC layout i.e. (ROM code layout) than what is used by software ECC. This ECC layout change causes NAND filesystems created in v3.14 and prior to be unusable in v3.15 and later. So revert back to using software ECC scheme. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r--arch/arm/boot/dts/omap3430-sdp.dts2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/omap3430-sdp.dts b/arch/arm/boot/dts/omap3430-sdp.dts
index 02f69f4a8fd3..9bad94efe1c8 100644
--- a/arch/arm/boot/dts/omap3430-sdp.dts
+++ b/arch/arm/boot/dts/omap3430-sdp.dts
@@ -107,7 +107,7 @@
#address-cells = <1>;
#size-cells = <1>;
reg = <1 0 0x08000000>;
- ti,nand-ecc-opt = "ham1";
+ ti,nand-ecc-opt = "sw";
nand-bus-width = <8>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <36>;