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authorPeter De Schrijver <pdeschrijver@nvidia.com>2017-02-23 11:44:40 +0100
committerThierry Reding <treding@nvidia.com>2017-03-20 14:05:03 +0100
commite7a49675e2c273e5490ac4a5187fa1eeddbdd4b4 (patch)
treec5c932b6699c7c32012150aa0259e7398a774e97
parentclk: tegra: Fix ISP clock modelling (diff)
downloadlinux-e7a49675e2c273e5490ac4a5187fa1eeddbdd4b4.tar.xz
linux-e7a49675e2c273e5490ac4a5187fa1eeddbdd4b4.zip
clk: tegra: Correct afi clock parent
The parent for afi is actually mselect, not clk_m. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Tested-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
-rw-r--r--drivers/clk/tegra/clk-tegra-periph.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/tegra/clk-tegra-periph.c b/drivers/clk/tegra/clk-tegra-periph.c
index 19b00b77ecbe..c9e795b190f2 100644
--- a/drivers/clk/tegra/clk-tegra-periph.c
+++ b/drivers/clk/tegra/clk-tegra-periph.c
@@ -815,7 +815,7 @@ static struct tegra_periph_init_data gate_clks[] = {
GATE("usb2", "clk_m", 58, 0, tegra_clk_usb2, 0),
GATE("usb3", "clk_m", 59, 0, tegra_clk_usb3, 0),
GATE("csi", "pll_p_out3", 52, 0, tegra_clk_csi, 0),
- GATE("afi", "clk_m", 72, 0, tegra_clk_afi, 0),
+ GATE("afi", "mselect", 72, 0, tegra_clk_afi, 0),
GATE("csus", "clk_m", 92, TEGRA_PERIPH_NO_RESET, tegra_clk_csus, 0),
GATE("dds", "clk_m", 150, TEGRA_PERIPH_ON_APB, tegra_clk_dds, 0),
GATE("dp2", "clk_m", 152, TEGRA_PERIPH_ON_APB, tegra_clk_dp2, 0),