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authorNeil Armstrong <narmstrong@baylibre.com>2020-03-13 10:07:11 +0100
committerKevin Hilman <khilman@baylibre.com>2020-03-17 23:15:08 +0100
commitf12a463d2f43b9c87fcf9d53615491f23ad44529 (patch)
tree5a14dcc36b1c1dcd8a9681a695ea2a34944f7dd7
parentarm64: dts: meson-g12: split emmc pins to select 4 or 8 bus width (diff)
downloadlinux-f12a463d2f43b9c87fcf9d53615491f23ad44529.tar.xz
linux-f12a463d2f43b9c87fcf9d53615491f23ad44529.zip
arm64: dts: meson-g12: add the SPIFC nodes
Add the controller and pinctrl nodes to enable the SPI Flash Controller on the Amlogic G12A and compatible SoCs. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20200313090713.15147-3-narmstrong@baylibre.com
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi20
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-g12.dtsi1
2 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
index 35f50a6895a2..0882ea215b88 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
@@ -593,6 +593,17 @@
};
};
+ nor_pins: nor {
+ mux {
+ groups = "nor_d",
+ "nor_q",
+ "nor_c",
+ "nor_cs";
+ function = "nor";
+ bias-disable;
+ };
+ };
+
pdm_din0_a_pins: pdm-din0-a {
mux {
groups = "pdm_din0_a";
@@ -2146,6 +2157,15 @@
status = "disabled";
};
+ spifc: spi@14000 {
+ compatible = "amlogic,meson-gxbb-spifc";
+ status = "disabled";
+ reg = <0x0 0x14000 0x0 0x80>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clkc CLKID_CLK81>;
+ };
+
pwm_ef: pwm@19000 {
compatible = "amlogic,meson-g12a-ee-pwm";
reg = <0x0 0x19000 0x0 0x20>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12.dtsi
index 55d39020ec72..783e5a397f86 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12.dtsi
@@ -1,3 +1,4 @@
+
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 BayLibre, SAS