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authorJoshua Clayton <stillcompiling@gmail.com>2017-06-14 17:36:28 +0200
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2017-07-17 17:26:14 +0200
commitf2b56452c48a6973e447dbe64ae44212e656db42 (patch)
tree477b2fae37f11ed84c88678b1c27acd8f8ef9038
parentfpga: Add flag to indicate SPI bitstream is bit-reversed (diff)
downloadlinux-f2b56452c48a6973e447dbe64ae44212e656db42.tar.xz
linux-f2b56452c48a6973e447dbe64ae44212e656db42.zip
doc: dt: document altera-passive-serial binding
Describe an altera-passive-serial devicetree entry, required features Signed-off-by: Joshua Clayton <stillcompiling@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Alan Tull <atull@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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+Altera Passive Serial SPI FPGA Manager
+
+Altera FPGAs support a method of loading the bitstream over what is
+referred to as "passive serial".
+The passive serial link is not technically SPI, and might require extra
+circuits in order to play nicely with other SPI slaves on the same bus.
+
+See https://www.altera.com/literature/hb/cyc/cyc_c51013.pdf
+
+Required properties:
+- compatible: Must be one of the following:
+ "altr,fpga-passive-serial",
+ "altr,fpga-arria10-passive-serial"
+- reg: SPI chip select of the FPGA
+- nconfig-gpios: config pin (referred to as nCONFIG in the manual)
+- nstat-gpios: status pin (referred to as nSTATUS in the manual)
+
+Optional properties:
+- confd-gpios: confd pin (referred to as CONF_DONE in the manual)
+
+Example:
+ fpga: fpga@0 {
+ compatible = "altr,fpga-passive-serial";
+ spi-max-frequency = <20000000>;
+ reg = <0>;
+ nconfig-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>;
+ nstat-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>;
+ confd-gpios = <&gpio4 12 GPIO_ACTIVE_LOW>;
+ };