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| author | David Daney <ddaney@caviumnetworks.com> | 2010-10-08 01:03:46 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2010-10-29 20:08:38 +0200 |
| commit | f92a6b0875977132074a696e8d44c95e8472d8ac (patch) | |
| tree | c1c7763f5dcbe637648f3c1b5174609673e30c54 | |
| parent | MIPS: Octeon: Probe for Octeon II CPUs. (diff) | |
| download | linux-f92a6b0875977132074a696e8d44c95e8472d8ac.tar.xz linux-f92a6b0875977132074a696e8d44c95e8472d8ac.zip | |
MIPS: Octeon: Enable Read Inhibit / eXecute Inhibit on Octeon II.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/1666/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| -rw-r--r-- | arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h b/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h index c84ed74e3c8a..0d5a42b5f47a 100644 --- a/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h +++ b/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h @@ -59,7 +59,7 @@ #define cpu_has_veic 0 #define cpu_hwrena_impl_bits 0xc0000000 -#define kernel_uses_smartmips_rixi (cpu_data[0].cputype == CPU_CAVIUM_OCTEON_PLUS) +#define kernel_uses_smartmips_rixi (cpu_data[0].cputype != CPU_CAVIUM_OCTEON) #define ARCH_HAS_IRQ_PER_CPU 1 #define ARCH_HAS_SPINLOCK_PREFETCH 1 |