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authorArd Biesheuvel <ardb@kernel.org>2024-02-14 13:29:17 +0100
committerCatalin Marinas <catalin.marinas@arm.com>2024-02-16 13:42:39 +0100
commita6bbf5d4d9d13509fd068de664238c16934962c6 (patch)
treedd6cf839e7e166c851e1b23fdfa830951878ea6f /CREDITS
parentarm64: mm: Add LPA2 support to phys<->pte conversion routines (diff)
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arm64: mm: Add definitions to support 5 levels of paging
Add the required types and descriptor accessors to support 5 levels of paging in the common code. This is one of the prerequisites for supporting 52-bit virtual addressing with 4k pages. Note that this does not cover the code that handles kernel mappings or the fixmap. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/20240214122845.2033971-76-ardb+git@google.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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