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authorRob Herring <robh@kernel.org>2018-05-15 15:49:52 +0200
committerRob Herring <robh@kernel.org>2018-10-11 21:48:56 +0200
commit157b4129ded8ba756ef17c058192e734889673e4 (patch)
treecd8eac83d40a8b194494cec66b344fc0f160ebfd /Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-scfg.txt
parentdt-bindings: arm: atmel: Move various sys registers out of SoC binding doc (diff)
downloadlinux-157b4129ded8ba756ef17c058192e734889673e4.tar.xz
linux-157b4129ded8ba756ef17c058192e734889673e4.zip
dt-bindings: arm: fsl: Move DCFG and SCFG bindings to their own docs
In preparation to convert board-level bindings to json-schema, move various misc SoC bindings out to their own file. Acked-by: Shawn Guo <shawnguo@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
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+Freescale SCFG
+
+SCFG is the supplemental configuration unit, that provides SoC specific
+configuration and status registers for the chip. Such as getting PEX port
+status.
+
+Required properties:
+ - compatible: Should contain a chip-specific compatible string,
+ Chip-specific strings are of the form "fsl,<chip>-scfg",
+ The following <chip>s are known to be supported:
+ ls1012a, ls1021a, ls1043a, ls1046a, ls2080a.
+
+ - reg: should contain base address and length of SCFG memory-mapped registers
+
+Example:
+ scfg: scfg@1570000 {
+ compatible = "fsl,ls1021a-scfg";
+ reg = <0x0 0x1570000 0x0 0x10000>;
+ };