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| author | Claudiu Beznea <claudiu.beznea@microchip.com> | 2022-06-10 11:24:07 +0200 |
|---|---|---|
| committer | Sebastian Reichel <sebastian.reichel@collabora.com> | 2022-06-17 17:20:00 +0200 |
| commit | e9405be8f9c204ea7e103b37821efea8aba5a79a (patch) | |
| tree | 11e37ed451713486184e59cd56e34a79b7e92466 /Documentation/devicetree/bindings/arm | |
| parent | Linux 5.19-rc1 (diff) | |
| download | linux-e9405be8f9c204ea7e103b37821efea8aba5a79a.tar.xz linux-e9405be8f9c204ea7e103b37821efea8aba5a79a.zip | |
dt-bindings: reset: convert Atmel/Microchip reset controller to YAML
Convert Atmel/Microchip reset controller to YAML.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Diffstat (limited to 'Documentation/devicetree/bindings/arm')
| -rw-r--r-- | Documentation/devicetree/bindings/arm/atmel-sysregs.txt | 15 |
1 files changed, 0 insertions, 15 deletions
diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt index 16eef600d599..ab1b352344ae 100644 --- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt +++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt @@ -25,21 +25,6 @@ System Timer (ST) required properties: Its subnodes can be: - watchdog: compatible should be "atmel,at91rm9200-wdt" -RSTC Reset Controller required properties: -- compatible: Should be "atmel,<chip>-rstc". - <chip> can be "at91sam9260", "at91sam9g45", "sama5d3" or "samx7" - it also can be "microchip,sam9x60-rstc" -- reg: Should contain registers location and length -- clocks: phandle to input clock. - -Example: - - rstc@fffffd00 { - compatible = "atmel,at91sam9260-rstc"; - reg = <0xfffffd00 0x10>; - clocks = <&clk32k>; - }; - RAMC SDRAM/DDR Controller required properties: - compatible: Should be "atmel,at91rm9200-sdramc", "syscon" "atmel,at91sam9260-sdramc", |