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authorMaxime Ripard <maxime@cerno.tech>2019-12-09 10:35:58 +0100
committerMaxime Ripard <maxime@cerno.tech>2019-12-16 18:07:06 +0100
commitc1cc29f2a04552d140c40fbe084f3e75cebccdd9 (patch)
tree9574f058caa2badc155834cbde9b7de8b59a5c75 /Documentation/devicetree/bindings/clock/sun9i-de.txt
parentdt-bindings: clocks: Convert Allwinner A80 USB clocks to a schema (diff)
downloadlinux-c1cc29f2a04552d140c40fbe084f3e75cebccdd9.tar.xz
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dt-bindings: clocks: Convert Allwinner A80 DE clocks to a schema
The Allwinner A80 SoC has a display clocks controller that is supported in Linux, with a matching Device Tree binding. Now that we have the DT validation in place, let's convert the device tree bindings for that controller over to a YAML schemas. Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Diffstat (limited to 'Documentation/devicetree/bindings/clock/sun9i-de.txt')
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diff --git a/Documentation/devicetree/bindings/clock/sun9i-de.txt b/Documentation/devicetree/bindings/clock/sun9i-de.txt
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--- a/Documentation/devicetree/bindings/clock/sun9i-de.txt
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@@ -1,28 +0,0 @@
-Allwinner A80 Display Engine Clock Control Binding
---------------------------------------------------
-
-Required properties :
-- compatible: must contain one of the following compatibles:
- - "allwinner,sun9i-a80-de-clks"
-
-- reg: Must contain the registers base address and length
-- clocks: phandle to the clocks feeding the display engine subsystem.
- Three are needed:
- - "mod": the display engine module clock
- - "dram": the DRAM bus clock for the system
- - "bus": the bus clock for the whole display engine subsystem
-- clock-names: Must contain the clock names described just above
-- resets: phandle to the reset control for the display engine subsystem.
-- #clock-cells : must contain 1
-- #reset-cells : must contain 1
-
-Example:
-de_clocks: clock@3000000 {
- compatible = "allwinner,sun9i-a80-de-clks";
- reg = <0x03000000 0x30>;
- clocks = <&ccu CLK_DE>, <&ccu CLK_SDRAM>, <&ccu CLK_BUS_DE>;
- clock-names = "mod", "dram", "bus";
- resets = <&ccu RST_BUS_DE>;
- #clock-cells = <1>;
- #reset-cells = <1>;
-};