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authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>2021-08-29 17:47:50 +0200
committerStephen Boyd <sboyd@kernel.org>2021-10-15 02:50:30 +0200
commit730d688fce076e92dfbc8881d5a216fc3a7d0029 (patch)
treefd6c9ca24e812d0ef3e7664252ca7d8398a18779 /Documentation/devicetree/bindings/clock
parentclk: qcom: gcc-sc7280: Drop unused array (diff)
downloadlinux-730d688fce076e92dfbc8881d5a216fc3a7d0029.tar.xz
linux-730d688fce076e92dfbc8881d5a216fc3a7d0029.zip
dt-bindings: clock: qcom,dispcc-sm8x50: add mmcx power domain
On sm8250 dispcc requires MMCX power domain to be powered up before clock controller's registers become available. For now sm8250 was using external regulator driven by the power domain to describe this relationship. Switch into specifying power-domain and required opp-state directly. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210829154757.784699-2-dmitry.baryshkov@linaro.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/clock')
-rw-r--r--Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml13
1 files changed, 13 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml
index 6667261dc665..31497677e8de 100644
--- a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml
@@ -56,6 +56,16 @@ properties:
reg:
maxItems: 1
+ power-domains:
+ description:
+ A phandle and PM domain specifier for the MMCX power domain.
+ maxItems: 1
+
+ required-opps:
+ description:
+ A phandle to an OPP node describing required MMCX performance point.
+ maxItems: 1
+
required:
- compatible
- reg
@@ -70,6 +80,7 @@ additionalProperties: false
examples:
- |
#include <dt-bindings/clock/qcom,rpmh.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
clock-controller@af00000 {
compatible = "qcom,sm8250-dispcc";
reg = <0x0af00000 0x10000>;
@@ -90,5 +101,7 @@ examples:
#clock-cells = <1>;
#reset-cells = <1>;
#power-domain-cells = <1>;
+ power-domains = <&rpmhpd SM8250_MMCX>;
+ required-opps = <&rpmhpd_opp_low_svs>;
};
...