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author | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2024-05-29 16:47:01 +0200 |
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committer | Bjorn Andersson <andersson@kernel.org> | 2024-06-01 01:07:30 +0200 |
commit | e81e9a845bab76461f952b6d81cf599ab957a33a (patch) | |
tree | 7bc46e44d3f58d84556c9690af40889ee53e210f /Documentation/devicetree/bindings/clock | |
parent | dt-bindings: clock: qcom,gcc: sort out power-domains support (diff) | |
download | linux-e81e9a845bab76461f952b6d81cf599ab957a33a.tar.xz linux-e81e9a845bab76461f952b6d81cf599ab957a33a.zip |
dt-bindings: clock: add schema for qcom,gcc-mdm9615
Add schema for the Global Clock Controller (GCC) present on the Qualcomm
MDM9615 platform.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240529-qcom-gdscs-v2-3-69c63d0ae1e7@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/clock')
-rw-r--r-- | Documentation/devicetree/bindings/clock/qcom,gcc-mdm9615.yaml | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-mdm9615.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-mdm9615.yaml new file mode 100644 index 000000000000..418dea31eb62 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-mdm9615.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,gcc-mdm9615.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Global Clock & Reset Controller + +maintainers: + - Stephen Boyd <sboyd@kernel.org> + - Taniya Das <quic_tdas@quicinc.com> + +description: | + Qualcomm global clock control module provides the clocks, resets and power + domains. + + See also:: + include/dt-bindings/clock/qcom,gcc-mdm9615.h + +allOf: + - $ref: qcom,gcc.yaml# + +properties: + compatible: + enum: + - qcom,gcc-mdm9615 + + clocks: + items: + - description: CXO clock + - description: PLL4 from LLC + + '#power-domain-cells': false + +required: + - compatible + +unevaluatedProperties: false + +examples: + - | + clock-controller@900000 { + compatible = "qcom,gcc-mdm9615"; + reg = <0x900000 0x4000>; + #clock-cells = <1>; + #reset-cells = <1>; + clocks = <&cxo_board>, + <&lcc_pll4>; + }; +... |