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authorLior Amsalem <alior@marvell.com>2015-05-26 15:07:34 +0200
committerVinod Koul <vinod.koul@intel.com>2015-06-10 18:48:30 +0200
commit6f166312c6ea2c010c6425c48506d2bbad491c03 (patch)
tree0627dad8afc1a66825e80e137c57d89f579e0aa0 /Documentation/devicetree/bindings/dma/mv-xor.txt
parentdmaengine: mv_xor: Rename function for consistent naming (diff)
downloadlinux-6f166312c6ea2c010c6425c48506d2bbad491c03.tar.xz
linux-6f166312c6ea2c010c6425c48506d2bbad491c03.zip
dmaengine: mv_xor: add support for a38x command in descriptor mode
The Marvell Armada 38x SoC introduce new features to the XOR engine, especially the fact that the engine mode (MEMCPY/XOR/PQ/etc) can be part of the descriptor and not set through the controller registers. This new feature allows mixing of different commands (even PQ) on the same channel/chain without the need to stop the engine to reconfigure the engine mode. Refactor the driver to be able to use that new feature on the Armada 38x, while keeping the old behaviour on the older SoCs. Signed-off-by: Lior Amsalem <alior@marvell.com> Reviewed-by: Ofer Heifetz <oferh@marvell.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'Documentation/devicetree/bindings/dma/mv-xor.txt')
-rw-r--r--Documentation/devicetree/bindings/dma/mv-xor.txt2
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/dma/mv-xor.txt b/Documentation/devicetree/bindings/dma/mv-xor.txt
index 7c6cb7fcecd2..cc29c35266e2 100644
--- a/Documentation/devicetree/bindings/dma/mv-xor.txt
+++ b/Documentation/devicetree/bindings/dma/mv-xor.txt
@@ -1,7 +1,7 @@
* Marvell XOR engines
Required properties:
-- compatible: Should be "marvell,orion-xor"
+- compatible: Should be "marvell,orion-xor" or "marvell,armada-380-xor"
- reg: Should contain registers location and length (two sets)
the first set is the low registers, the second set the high
registers for the XOR engine.