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| author | Heiko Stuebner <heiko@sntech.de> | 2017-09-03 21:53:12 +0200 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2017-09-22 11:17:47 +0200 |
| commit | 6e480762aa3fb83a038761a54343e197a984821a (patch) | |
| tree | 203badf8021ba459a8662a3e3d63e9f5de6c8029 /Documentation/devicetree/bindings/gpu | |
| parent | ARM: dts: rockchip: enable vops and hdmi output on rk3288-vyasa (diff) | |
| download | linux-6e480762aa3fb83a038761a54343e197a984821a.tar.xz linux-6e480762aa3fb83a038761a54343e197a984821a.zip | |
dt-bindings: gpu: mali-utgard: Add Rockchip Utgard Malis
Some (older or lower power) Rockchip socs use Utgard-based Mali-GPUs.
So add the necessary compatibles for them. As the setup is the same for
all of them (needing only the additional reset line), they get added in
a somewhat condensed form, to not inflate the document unnecessary.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/gpu')
| -rw-r--r-- | Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt index b4ebd56d03f3..24aacafb2594 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt +++ b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt @@ -13,6 +13,10 @@ Required properties: + allwinner,sun50i-h5-mali + amlogic,meson-gxbb-mali + amlogic,meson-gxl-mali + + rockchip,rk3036-mali + + rockchip,rk3066-mali + + rockchip,rk3188-mali + + rockchip,rk3228-mali + stericsson,db8500-mali - reg: Physical base address and length of the GPU registers @@ -63,6 +67,10 @@ to specify one more vendor-specific compatible, among: Required properties: * resets: phandle to the reset line for the GPU + - Rockchip variants: + Required properties: + * resets: phandle to the reset line for the GPU + - stericsson,db8500-mali Required properties: * interrupt-names and interrupts: |