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| author | Jiaxun Yang <jiaxun.yang@flygoat.com> | 2020-05-28 17:27:54 +0200 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2020-05-29 10:42:19 +0200 |
| commit | da10a4b626657387845f32d37141fc7d48ebbdb3 (patch) | |
| tree | 6c253aa0b4f9a449f7e047774444b4c351034569 /Documentation/devicetree/bindings/interrupt-controller | |
| parent | irqchip: Add Loongson PCH MSI controller (diff) | |
| download | linux-da10a4b626657387845f32d37141fc7d48ebbdb3.tar.xz linux-da10a4b626657387845f32d37141fc7d48ebbdb3.zip | |
dt-bindings: interrupt-controller: Add Loongson PCH MSI
Add binding for Loongson PCH MSI controller.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200528152757.1028711-7-jiaxun.yang@flygoat.com
Diffstat (limited to 'Documentation/devicetree/bindings/interrupt-controller')
| -rw-r--r-- | Documentation/devicetree/bindings/interrupt-controller/loongson,pch-msi.yaml | 62 |
1 files changed, 62 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-msi.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-msi.yaml new file mode 100644 index 000000000000..1a5ebbdd219a --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-msi.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/interrupt-controller/loongson,pch-msi.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Loongson PCH MSI Controller + +maintainers: + - Jiaxun Yang <jiaxun.yang@flygoat.com> + +description: + This interrupt controller is found in the Loongson LS7A family of PCH for + transforming interrupts from PCIe MSI into HyperTransport vectorized + interrupts. + +properties: + compatible: + const: loongson,pch-msi-1.0 + + reg: + maxItems: 1 + + loongson,msi-base-vec: + description: + u32 value of the base of parent HyperTransport vector allocated + to PCH MSI. + allOf: + - $ref: "/schemas/types.yaml#/definitions/uint32" + - minimum: 0 + maximum: 255 + + loongson,msi-num-vecs: + description: + u32 value of the number of parent HyperTransport vectors allocated + to PCH MSI. + allOf: + - $ref: "/schemas/types.yaml#/definitions/uint32" + - minimum: 1 + maximum: 256 + + msi-controller: true + +required: + - compatible + - reg + - msi-controller + - loongson,msi-base-vec + - loongson,msi-num-vecs + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + msi: msi-controller@2ff00000 { + compatible = "loongson,pch-msi-1.0"; + reg = <0x2ff00000 0x4>; + msi-controller; + loongson,msi-base-vec = <64>; + loongson,msi-num-vecs = <64>; + interrupt-parent = <&htvec>; + }; +... |