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| author | Rob Herring <robh@kernel.org> | 2018-04-25 21:24:59 +0200 |
|---|---|---|
| committer | Rob Herring <robh@kernel.org> | 2018-04-27 23:56:47 +0200 |
| commit | 2359ccddc1c3f4752f43cc19b3db189710b15791 (patch) | |
| tree | 176ed8de6384351f7a901f6109d121bac41d0e24 /Documentation/devicetree/bindings/timer/fsl,gtm.txt | |
| parent | dt-bindings: thermal: rcar-gen3-thermal: update register size in example (diff) | |
| download | linux-2359ccddc1c3f4752f43cc19b3db189710b15791.tar.xz linux-2359ccddc1c3f4752f43cc19b3db189710b15791.zip | |
dt-bindings: move various timer bindings to timer/ directory
Bindings are supposed to be organized by device class/function. Move
bindings for various timers to timer/ binding directory.
Cc: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/timer/fsl,gtm.txt')
| -rw-r--r-- | Documentation/devicetree/bindings/timer/fsl,gtm.txt | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/timer/fsl,gtm.txt b/Documentation/devicetree/bindings/timer/fsl,gtm.txt new file mode 100644 index 000000000000..9a33efded4bc --- /dev/null +++ b/Documentation/devicetree/bindings/timer/fsl,gtm.txt @@ -0,0 +1,31 @@ +* Freescale General-purpose Timers Module + +Required properties: + - compatible : should be + "fsl,<chip>-gtm", "fsl,gtm" for SOC GTMs + "fsl,<chip>-qe-gtm", "fsl,qe-gtm", "fsl,gtm" for QE GTMs + "fsl,<chip>-cpm2-gtm", "fsl,cpm2-gtm", "fsl,gtm" for CPM2 GTMs + - reg : should contain gtm registers location and length (0x40). + - interrupts : should contain four interrupts. + - interrupt-parent : interrupt source phandle. + - clock-frequency : specifies the frequency driving the timer. + +Example: + +timer@500 { + compatible = "fsl,mpc8360-gtm", "fsl,gtm"; + reg = <0x500 0x40>; + interrupts = <90 8 78 8 84 8 72 8>; + interrupt-parent = <&ipic>; + /* filled by u-boot */ + clock-frequency = <0>; +}; + +timer@440 { + compatible = "fsl,mpc8360-qe-gtm", "fsl,qe-gtm", "fsl,gtm"; + reg = <0x440 0x40>; + interrupts = <12 13 14 15>; + interrupt-parent = <&qeic>; + /* filled by u-boot */ + clock-frequency = <0>; +}; |