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| author | John Crispin <blogic@openwrt.org> | 2012-07-20 18:58:34 +0200 |
|---|---|---|
| committer | John Crispin <blogic@openwrt.org> | 2013-02-17 01:25:28 +0100 |
| commit | 247796175ea5dc7c838e8e76a14795fb09360649 (patch) | |
| tree | fd354393e40da35f650de32989c40360bfb4c93c /Documentation/devicetree | |
| parent | MIPS: ath79: simplify MISC IRQ handling (diff) | |
| download | linux-247796175ea5dc7c838e8e76a14795fb09360649.tar.xz linux-247796175ea5dc7c838e8e76a14795fb09360649.zip | |
Document: devicetree: add OF documents for lantiq serial port
Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: devicetree-discuss@lists.ozlabs.org
Diffstat (limited to 'Documentation/devicetree')
| -rw-r--r-- | Documentation/devicetree/bindings/serial/lantiq_asc.txt | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/serial/lantiq_asc.txt b/Documentation/devicetree/bindings/serial/lantiq_asc.txt new file mode 100644 index 000000000000..5b78591aaa46 --- /dev/null +++ b/Documentation/devicetree/bindings/serial/lantiq_asc.txt @@ -0,0 +1,16 @@ +Lantiq SoC ASC serial controller + +Required properties: +- compatible : Should be "lantiq,asc" +- reg : Address and length of the register set for the device +- interrupts: the 3 (tx rx err) interrupt numbers. The interrupt specifier + depends on the interrupt-parent interrupt controller. + +Example: + +asc1: serial@E100C00 { + compatible = "lantiq,asc"; + reg = <0xE100C00 0x400>; + interrupt-parent = <&icu0>; + interrupts = <112 113 114>; +}; |