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| author | Patrice Chotard <patrice.chotard@st.com> | 2016-06-28 11:21:52 +0200 |
|---|---|---|
| committer | Patrice Chotard <patrice.chotard@st.com> | 2016-07-11 09:15:44 +0200 |
| commit | 7b8e0188fa717cd9abc4fb52587445b421835c2a (patch) | |
| tree | 1a8750b93a459bcb56a257f4b906c902c89c916d /Documentation/extcon | |
| parent | ARM: STi: Update machine _namestr to be more generic. (diff) | |
| download | linux-7b8e0188fa717cd9abc4fb52587445b421835c2a.tar.xz linux-7b8e0188fa717cd9abc4fb52587445b421835c2a.zip | |
ARM: sti: Implement dummy L2 cache's write_sec
This patch implements the write_sec callback that handle PL310
secure registers writes.
This callback is just a stub for now, to avoid system crash.
Later, it could handle SMC calls so that TZ handles the needed writes.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Diffstat (limited to 'Documentation/extcon')
0 files changed, 0 insertions, 0 deletions