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authorGregory CLEMENT <gregory.clement@free-electrons.com>2017-04-05 17:18:04 +0200
committerLinus Walleij <linus.walleij@linaro.org>2017-04-24 11:31:36 +0200
commit87466ccd9401c4ac3971c437b7f634444fa7ace2 (patch)
tree43f68f040efb6cc3c93dc1e186aa1a4b6e9a3605 /Documentation/scheduler/sched-deadline.txt
parentpinctrl: dt-bindings: Add documentation for Armada 37xx pin controllers (diff)
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pinctrl: armada-37xx: Add pin controller support for Armada 37xx
The Armada 37xx SoC come with 2 pin controllers: one on the south bridge (managing 28 pins) and one on the north bridge (managing 36 pins). At the hardware level the controller configure the pins by group and not pin by pin. This constraint is reflected in the design of the driver: only the group related functions are implemented. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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