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author | Chen-Yu Tsai <wens@csie.org> | 2015-12-05 14:16:43 +0100 |
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committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2015-12-08 11:05:27 +0100 |
commit | 3cdd9f5c4953465abb87ec757159cc0576ae6b0a (patch) | |
tree | 9304b707c35d6f0e650ecf7e97cfbaa7098382a9 /Documentation | |
parent | clk: sunxi: Add H3 clocks support (diff) | |
download | linux-3cdd9f5c4953465abb87ec757159cc0576ae6b0a.tar.xz linux-3cdd9f5c4953465abb87ec757159cc0576ae6b0a.zip |
clk: sunxi: Add VE (Video Engine) module clock driver for sun[457]i
The video engine has its own special module clock, consisting of a clock
gate, configurable dividers, and a reset control.
On later (sun[68]i) families, the reset control is moved out of this
piece of hardware and grouped with reset controls of other peripherals.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Tested-by: Jens Kuske <jenskuske@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/clock/sunxi.txt | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt b/Documentation/devicetree/bindings/clock/sunxi.txt index 014eab8673f5..e59f57b24777 100644 --- a/Documentation/devicetree/bindings/clock/sunxi.txt +++ b/Documentation/devicetree/bindings/clock/sunxi.txt @@ -76,6 +76,7 @@ Required properties: "allwinner,sun8i-h3-usb-clk" - for usb gates + resets on H3 "allwinner,sun9i-a80-usb-mod-clk" - for usb gates + resets on A80 "allwinner,sun9i-a80-usb-phy-clk" - for usb phy gates + resets on A80 + "allwinner,sun4i-a10-ve-clk" - for the Video Engine clock Required properties for all clocks: - reg : shall be the control register address for the clock. @@ -95,6 +96,9 @@ Required properties for all clocks: And "allwinner,*-usb-clk" clocks also require: - reset-cells : shall be set to 1 +The "allwinner,sun4i-a10-ve-clk" clock also requires: +- reset-cells : shall be set to 0 + The "allwinner,sun9i-a80-mmc-config-clk" clock also requires: - #reset-cells : shall be set to 1 - resets : shall be the reset control phandle for the mmc block. |