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authorVineet Gupta <vgupta@synopsys.com>2013-05-13 13:53:58 +0200
committerVineet Gupta <vgupta@synopsys.com>2013-06-22 15:53:19 +0200
commit2ed21dae021db1f9f988494ceee519290217520d (patch)
treed7354ec3e76a08e933b8481b6c0b7f8c6a7e51a7 /arch/arc/include/asm/cacheflush.h
parentARC: [mm] optimise VIPT dcache aliasing 2/x (diff)
downloadlinux-2ed21dae021db1f9f988494ceee519290217520d.tar.xz
linux-2ed21dae021db1f9f988494ceee519290217520d.zip
ARC: [mm] Assume pagecache page dirty by default
Similar to ARM/SH Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/include/asm/cacheflush.h')
-rw-r--r--arch/arc/include/asm/cacheflush.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arc/include/asm/cacheflush.h b/arch/arc/include/asm/cacheflush.h
index 185dfd03dcdb..6abc4972bc93 100644
--- a/arch/arc/include/asm/cacheflush.h
+++ b/arch/arc/include/asm/cacheflush.h
@@ -81,6 +81,13 @@ void flush_anon_page(struct vm_area_struct *vma,
#endif /* CONFIG_ARC_CACHE_VIPT_ALIASING */
/*
+ * A new pagecache page has PG_arch_1 clear - thus dcache dirty by default
+ * This works around some PIO based drivers which don't call flush_dcache_page
+ * to record that they dirtied the dcache
+ */
+#define PG_dc_clean PG_arch_1
+
+/*
* Simple wrapper over config option
* Bootup code ensures that hardware matches kernel configuration
*/