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author | Ezequiel Garcia <ezequiel.garcia@free-electrons.com> | 2013-07-26 15:17:57 +0200 |
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committer | Jason Cooper <jason@lakedaemon.net> | 2013-08-06 16:11:16 +0200 |
commit | 5e12a613ce393472316063dab062ad1afad84cc5 (patch) | |
tree | e1eb06eebbd8f9c75851413d2f811b11bf28f0b0 /arch/arm/boot/dts/armada-xp-gp.dts | |
parent | ARM: mvebu: Use the preprocessor on Armada 370/XP device tree files (diff) | |
download | linux-5e12a613ce393472316063dab062ad1afad84cc5.tar.xz linux-5e12a613ce393472316063dab062ad1afad84cc5.zip |
ARM: mvebu: Add MBus to Armada 370/XP device tree
The Armada 370/XP SoC family has a completely configurable address
space handled by the MBus controller.
This patch introduces the device tree layout of MBus, making the
'soc' node as mbus-compatible.
Since every peripheral/controller is a child of this 'soc' node,
this makes all of them sit behind the mbus, thus describing the
hardware accurately.
A translation entry has been added for the internal-regs mapping.
This can't be done in the common armada-370-xp.dtsi because A370
and AXP have different addressing width.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/boot/dts/armada-xp-gp.dts')
-rw-r--r-- | arch/arm/boot/dts/armada-xp-gp.dts | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/armada-xp-gp.dts b/arch/arm/boot/dts/armada-xp-gp.dts index 54843e5a049f..2fa920987780 100644 --- a/arch/arm/boot/dts/armada-xp-gp.dts +++ b/arch/arm/boot/dts/armada-xp-gp.dts @@ -39,9 +39,7 @@ }; soc { - ranges = <0 0 0xd0000000 0x100000 /* Internal registers 1MiB */ - 0xe0000000 0 0xe0000000 0x8100000 /* PCIe */ - 0xf0000000 0 0xf0000000 0x1000000 /* Device Bus, NOR 16MiB */>; + ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000>; internal-regs { serial@12000 { |