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author | Linus Walleij <linus.walleij@linaro.org> | 2017-07-05 16:59:33 +0200 |
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committer | Linus Walleij <linus.walleij@linaro.org> | 2017-08-08 14:20:00 +0200 |
commit | f328c2eac5d729a3654d2cef469b9e4acc338c4e (patch) | |
tree | 2c65a0faa5b12dc3f816eccb4dc21ca5752a4da6 /arch/arm/boot/dts/gemini-sq201.dts | |
parent | ARM: dts: Add DTS file for D-Link DIR-685 (diff) | |
download | linux-f328c2eac5d729a3654d2cef469b9e4acc338c4e.tar.xz linux-f328c2eac5d729a3654d2cef469b9e4acc338c4e.zip |
ARM: dts: gemini: add pin control set-up for the SoC
This adds the basic pin control muliplexing settings for the
Gemini SoC: parallel (NOR) flash, SATA, optional IDE, PCI and
UART.
We also select the right GPIO groups on all applicable systems
so that GPIO keys/LEDs work smoothly.
We can then build upon this for more complex systems.
Acked-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/gemini-sq201.dts')
-rw-r--r-- | arch/arm/boot/dts/gemini-sq201.dts | 36 |
1 files changed, 35 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/gemini-sq201.dts b/arch/arm/boot/dts/gemini-sq201.dts index 4d200f0bcd45..7cfa9caf47d4 100644 --- a/arch/arm/boot/dts/gemini-sq201.dts +++ b/arch/arm/boot/dts/gemini-sq201.dts @@ -33,6 +33,7 @@ wakeup-source; linux,code = <KEY_SETUP>; label = "factory reset"; + /* Conflict with NAND flash */ gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; }; }; @@ -41,12 +42,14 @@ compatible = "gpio-leds"; led@20 { label = "sq201:green:info"; + /* Conflict with parallel flash */ gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>; default-state = "on"; linux,default-trigger = "heartbeat"; }; led@31 { label = "sq201:green:usb"; + /* Conflict with parallel and NAND flash */ gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>; default-state = "off"; linux,default-trigger = "usb-host"; @@ -55,7 +58,15 @@ soc { flash@30000000 { - status = "okay"; + /* + * Flash access can be enabled, with the side effect + * of disabling access to GPIO LED on GPIO0[20] which + * reuse one of the parallel flash chip select lines. + * Also the default firmware on the machine has the + * problem that since it uses the flash, the two LEDS + * on the right become numb. + */ + /* status = "okay"; */ /* 16MB of flash */ reg = <0x30000000 0x01000000>; @@ -93,12 +104,35 @@ }; }; + syscon: syscon@40000000 { + pinctrl { + /* + * gpio0fgrp cover line 18 used by reset button + * gpio0ggrp cover line 20 used by info LED + * gpio0kgrp cover line 31 used by USB LED + */ + gpio0_default_pins: pinctrl-gpio0 { + mux { + function = "gpio0"; + groups = "gpio0fgrp", + "gpio0ggrp", + "gpio0kgrp"; + }; + }; + }; + }; + sata: sata@46000000 { cortina,gemini-ata-muxmode = <0>; cortina,gemini-enable-sata-bridge; status = "okay"; }; + gpio0: gpio@4d000000 { + pinctrl-names = "default"; + pinctrl-0 = <&gpio0_default_pins>; + }; + pci@50000000 { status = "okay"; interrupt-map-mask = <0xf800 0 0 7>; |