diff options
| author | Andre Przywara <andre.przywara@arm.com> | 2020-09-07 14:18:26 +0200 |
|---|---|---|
| committer | Wei Xu <xuwei5@hisilicon.com> | 2020-09-14 10:15:22 +0200 |
| commit | c26979a7acf20ab093513d8c09e371b212e02ded (patch) | |
| tree | aaee15880d2c382f65069b630ca28df6f53a1550 /arch/arm/boot/dts/hip04.dtsi | |
| parent | Linux 5.9-rc1 (diff) | |
| download | linux-c26979a7acf20ab093513d8c09e371b212e02ded.tar.xz linux-c26979a7acf20ab093513d8c09e371b212e02ded.zip | |
ARM: dts: hisilicon: Fix SP804 users
The SP804 binding only specifies one or three clocks, but does not allow
just two clocks.
The HiSi 3620 .dtsi specified two clocks for the two timers, plus gave
one "apb_pclk" clock-name to appease the primecell bus driver.
Extend the clocks by duplicating the first clock to the end of the clock
list, and add two dummy clock-names to make the primecell driver happy.
I don't know what the real APB clock for the IP is, but with the current
DT the first timer clock was used for that, so this change keeps the
current status.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Diffstat (limited to 'arch/arm/boot/dts/hip04.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/hip04.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/hip04.dtsi b/arch/arm/boot/dts/hip04.dtsi index 4263a9339c2e..f5871b1d1ec4 100644 --- a/arch/arm/boot/dts/hip04.dtsi +++ b/arch/arm/boot/dts/hip04.dtsi @@ -226,8 +226,8 @@ compatible = "arm,sp804", "arm,primecell"; reg = <0x3000000 0x1000>; interrupts = <0 224 4>; - clocks = <&clk_50m>, <&clk_50m>; - clock-names = "apb_pclk"; + clocks = <&clk_50m>, <&clk_50m>, <&clk_50m>; + clock-names = "timer0clk", "timer1clk", "apb_pclk"; }; arm-pmu { |