diff options
| author | Tony Lindgren <tony@atomide.com> | 2019-12-12 18:46:10 +0100 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2020-01-23 17:22:57 +0100 |
| commit | 723a567f43b8ffa8089009bc8a260cc6f963661e (patch) | |
| tree | dd71689be19e53aa442149435607cfa498e3806e /arch/arm/boot/dts/omap54xx-clocks.dtsi | |
| parent | ARM: dts: Add missing omap4 secure clocks (diff) | |
| download | linux-723a567f43b8ffa8089009bc8a260cc6f963661e.tar.xz linux-723a567f43b8ffa8089009bc8a260cc6f963661e.zip | |
ARM: dts: Add missing omap5 secure clocks
The secure clocks on omap5 are similar to what we already have for dra7
with dra7_l4sec_clkctrl_regs and documented in the omap5432 TRM in
"Table 3-1044. CORE_CM_CORE Registers Mapping Summary".
The secure clocks are part of the l4per clock manager. As the l4per
clock manager has now two clock domains as children, let's also update
the l4per clockdomain node name to follow the "clock" node naming with
a domain specific compatible property.
Compared to omap4, omap5 has more clocks working in hardare autogating
mode.
Cc: devicetree@vger.kernel.org
Cc: Rob Herring <robh+dt@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/omap54xx-clocks.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/omap54xx-clocks.dtsi | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/omap54xx-clocks.dtsi b/arch/arm/boot/dts/omap54xx-clocks.dtsi index 4791834dacb2..42f2c447727d 100644 --- a/arch/arm/boot/dts/omap54xx-clocks.dtsi +++ b/arch/arm/boot/dts/omap54xx-clocks.dtsi @@ -1125,11 +1125,17 @@ #size-cells = <1>; ranges = <0 0x1000 0x200>; - l4per_clkctrl: clk@20 { - compatible = "ti,clkctrl"; + l4per_clkctrl: clock@20 { + compatible = "ti,clkctrl-l4per", "ti,clkctrl"; reg = <0x20 0x15c>; #clock-cells = <2>; }; + + l4sec_clkctrl: clock@1a0 { + compatible = "ti,clkctrl-l4sec", "ti,clkctrl"; + reg = <0x1a0 0x3c>; + #clock-cells = <2>; + }; }; dss_cm: dss_cm@1400 { |