diff options
author | Konrad Dybcio <konrad.dybcio@somainline.org> | 2022-04-15 13:56:29 +0200 |
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committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2022-04-20 04:10:48 +0200 |
commit | 1dfe967ec7cfb03b468d096a69d945070f1cd2a0 (patch) | |
tree | 3d4e2e50438310b2c37b39f199d238822decacc3 /arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts | |
parent | ARM: dts: qcom-msm8974*: Enable IMEM unconditionally (diff) | |
download | linux-1dfe967ec7cfb03b468d096a69d945070f1cd2a0.tar.xz linux-1dfe967ec7cfb03b468d096a69d945070f1cd2a0.zip |
ARM: dts: qcom-msm8974*: Consolidate I2C/UART/SDHCI
Clean up and commonize (where possible and it makes sense to) I2C, UART
and SDHCI nodes and pin configurations.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220415115633.575010-20-konrad.dybcio@somainline.org
Diffstat (limited to 'arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts')
-rw-r--r-- | arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts | 117 |
1 files changed, 8 insertions, 109 deletions
diff --git a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts index 6537950c30ba..7e4e723f1dc3 100644 --- a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts +++ b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts @@ -59,9 +59,6 @@ status = "okay"; clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins>; - charger: bq24192@6b { compatible = "ti,bq24192"; reg = <0x6b>; @@ -93,9 +90,6 @@ status = "okay"; clock-frequency = <355000>; - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_pins>; - synaptics@70 { compatible = "syna,rmi4-i2c"; reg = <0x70>; @@ -126,9 +120,6 @@ status = "okay"; clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&i2c3_pins>; - avago_apds993@39 { compatible = "avago,apds9930"; reg = <0x39>; @@ -144,9 +135,6 @@ status = "okay"; clock-frequency = <355000>; - pinctrl-names = "default"; - pinctrl-0 = <&i2c11_pins>; - led-controller@38 { compatible = "ti,lm3630a"; status = "okay"; @@ -168,9 +156,6 @@ status = "okay"; clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&i2c12_pins>; - mpu6515@68 { compatible = "invensense,mpu6515"; reg = <0x68>; @@ -212,9 +197,6 @@ &blsp2_uart4 { status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&blsp2_uart4_pin_a>; - bluetooth { compatible = "brcm,bcm43438-bt"; max-speed = <3000000>; @@ -533,8 +515,9 @@ vmmc-supply = <&pm8941_l20>; vqmmc-supply = <&pm8941_s3>; - pinctrl-names = "default"; - pinctrl-0 = <&sdhc1_pin_a>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&sdc1_on>; + pinctrl-1 = <&sdc1_off>; }; &sdhc_2 { @@ -545,11 +528,9 @@ vqmmc-supply = <&pm8941_s3>; non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&sdhc2_pin_a>; - - #address-cells = <1>; - #size-cells = <0>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&sdc2_on>; + pinctrl-1 = <&sdc2_off>; bcrmf@1 { compatible = "brcm,bcm4339-fmac", "brcm,bcm4329-fmac"; @@ -563,7 +544,7 @@ }; &tlmm { - sdhc1_pin_a: sdhc1-pin-active { + sdc1_on: sdc1-on { clk { pins = "sdc1_clk"; drive-strength = <16>; @@ -577,7 +558,7 @@ }; }; - sdhc2_pin_a: sdhc2-pin-active { + sdc2_on: sdc2-on { clk { pins = "sdc2_clk"; drive-strength = <6>; @@ -591,54 +572,6 @@ }; }; - i2c1_pins: i2c1 { - mux { - pins = "gpio2", "gpio3"; - function = "blsp_i2c1"; - - drive-strength = <2>; - bias-disable; - }; - }; - - i2c2_pins: i2c2 { - mux { - pins = "gpio6", "gpio7"; - function = "blsp_i2c2"; - - drive-strength = <2>; - bias-disable; - }; - }; - - i2c3_pins: i2c3 { - mux { - pins = "gpio10", "gpio11"; - function = "blsp_i2c3"; - drive-strength = <2>; - bias-disable; - }; - }; - - i2c11_pins: i2c11 { - mux { - pins = "gpio83", "gpio84"; - function = "blsp_i2c11"; - - drive-strength = <2>; - bias-disable; - }; - }; - - i2c12_pins: i2c12 { - mux { - pins = "gpio87", "gpio88"; - function = "blsp_i2c12"; - drive-strength = <2>; - bias-disable; - }; - }; - mpu6515_pin: mpu6515 { irq { pins = "gpio73"; @@ -693,38 +626,4 @@ function = "gpio"; }; }; - - blsp2_uart4_pin_a: blsp2-uart4-pin-active { - tx { - pins = "gpio53"; - function = "blsp_uart10"; - - drive-strength = <2>; - bias-disable; - }; - - rx { - pins = "gpio54"; - function = "blsp_uart10"; - - drive-strength = <2>; - bias-pull-up; - }; - - cts { - pins = "gpio55"; - function = "blsp_uart10"; - - drive-strength = <2>; - bias-pull-up; - }; - - rts { - pins = "gpio56"; - function = "blsp_uart10"; - - drive-strength = <2>; - bias-disable; - }; - }; }; |