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authorGeert Uytterhoeven <geert+renesas@glider.be>2017-10-12 11:35:06 +0200
committerSimon Horman <horms+renesas@verge.net.au>2017-10-16 11:36:18 +0200
commita7869a5bc82682ac31452e178b4b3e9f8b48e7df (patch)
tree52d48878bc2ec4d424dc58bbc40d6fc853eb3424 /arch/arm/boot/dts/r8a73a4.dtsi
parentARM: dts: r8a7794: Use R-Car GPIO Gen2 fallback compat string (diff)
downloadlinux-a7869a5bc82682ac31452e178b4b3e9f8b48e7df.tar.xz
linux-a7869a5bc82682ac31452e178b4b3e9f8b48e7df.zip
ARM: dts: r8a73a4: Add clock for CA15 CPU0 core
Improve hardware description by adding a clocks property to the device node corresponding to the primary CA15 CPU core, which is for now the only one described. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a73a4.dtsi')
-rw-r--r--arch/arm/boot/dts/r8a73a4.dtsi1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
index 310222634570..dd4d09712a2a 100644
--- a/arch/arm/boot/dts/r8a73a4.dtsi
+++ b/arch/arm/boot/dts/r8a73a4.dtsi
@@ -27,6 +27,7 @@
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0>;
+ clocks = <&cpg_clocks R8A73A4_CLK_Z>;
clock-frequency = <1500000000>;
power-domains = <&pd_a2sl>;
next-level-cache = <&L2_CA15>;