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| author | Bo Shen <voice.shen@atmel.com> | 2015-01-04 10:02:27 +0100 |
|---|---|---|
| committer | Nicolas Ferre <nicolas.ferre@atmel.com> | 2015-01-15 16:13:40 +0100 |
| commit | cbaa29c4c3a7b880d196c15b41fc20dcfdac9ac1 (patch) | |
| tree | 18e59e33f338305d7871e8a120317de72570afc7 /arch/arm/boot/dts/sama5d3.dtsi | |
| parent | ARM: at91: dts: sama5d3: add isi clock (diff) | |
| download | linux-cbaa29c4c3a7b880d196c15b41fc20dcfdac9ac1.tar.xz linux-cbaa29c4c3a7b880d196c15b41fc20dcfdac9ac1.zip | |
ARM: at91: dts: sama5d3: split isi pinctrl
As the ISI has 12 data lines, however we only use 8 data lines with
sensor module. So, split the data line into two groups which make
it can be choosed depends on the hardware design.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/boot/dts/sama5d3.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/sama5d3.dtsi | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi index 9a6fdc265ae7..58b93d384f39 100644 --- a/arch/arm/boot/dts/sama5d3.dtsi +++ b/arch/arm/boot/dts/sama5d3.dtsi @@ -557,7 +557,7 @@ }; isi { - pinctrl_isi: isi-0 { + pinctrl_isi_data_0_7: isi-0-data-0-7 { atmel,pins = <AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */ AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */ @@ -569,10 +569,15 @@ AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */ AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC30 periph C ISI_PCK, conflicts with UTXD0 */ AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */ - AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */ - AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */ + AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */ + }; + + pinctrl_isi_data_8_9: isi-0-data-8-9 { + atmel,pins = + <AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */ AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */ }; + pinctrl_isi_pck_as_mck: isi_pck_as_mck-0 { atmel,pins = <AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD31 periph B ISI_MCK */ |